Bolt Graphics tapes out its first Zeus GPU test chip on TSMC 12nm — firm touts 17x lower cost of compute

Apr 23, 2026 - 17:30
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Bolt Graphics tapes out its first Zeus GPU test chip on TSMC 12nm — firm touts 17x lower cost of compute
The Zeus 1c26-032 (Image credit: Bolt Graphics)

Bolt Graphics has announced its completed tape-out of a test chip for its Zeus GPU, marking the California-based startup's first move from FPGA emulation to manufactured silicon — which it claims can deliver 17 times lower cost of compute.

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PCIe cards
Row 0 - Cell 0

Bolt Zeus 1c26-032

Bolt Zeus 2c26-064

Bolt Zeus 2x26-128

Form factor

Single-slot PCIe

Dual-slot PCIe

Dual-slot PCIe

Board power

120 W

250 W

250 W

FP64/FP32/FP16 vector TFLOPS

5/10/20

10/20/40

10/20/40

INT16/INT8 matrix TFLOPS

307.2/614.4

614.4/1,228.8

614.4/1,228.8

On-chip cache

128 MB

256 MB

256 MB

Memory

Up to 160 GB, 32 GB LPDDR5X, 2x DDR5 SO-DIMMs

Up to 320 GB, 64 GB LPDDR5X, 4x DDR5 SO-DIMMs

Up to 384 GB, 128 GB LPDDR5X, 4x DDR5 SO-DIMMs

Bolt's stated product pipeline exceeds $500 million, and the company says over 14,000 enterprises, developers, and end users have joined its early access program. It closed a Series A that was reportedly 50% oversubscribed, though neither the funding amount nor lead investors have been disclosed.

Timelines have shifted somewhat since Bolt first appeared on the scene, with the company originally aiming for developer kits in late 2025 and production in late 2026. At CES in January, the company demoed a prototype card but still lacked functional silicon. This new announcement pins production to Q4 2027 to supply chains for HPC, rendering, and next-gen workloads, with no updated timeline for developer hardware.

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Luke James is a freelance writer and journalist.  Although his background is in legal, he has a personal interest in all things tech, especially hardware and microelectronics, and anything regulatory. 

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